Position

Work type: Engineering, R&D | Work experience: No prior experience required | Location: Zürich, Switzerland

Position

As Graduate Hardware Engineer you will:

• be in charge of the design of one or more digital hardware modules, writing both RTL code and testbenches

• take responsibility for the verification of one or more modules

• investigate new technologies and techniques for AI acceleration

This is an entry-level position and we offer you the opportunity to experience different phases of technology development, from research to industrial design. You will have the freedom to discover the career that you are most interested in and suited for. Our expectation for graduate engineers is for them to start a long and successful career in Synthara, becoming in a few years key members of the engineering team.

Profile

You are committed to making your colleagues and team successful, you are a good communicator who can put the priorities of your team before yours. You're curious, solution-orientated and a problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome and then to improve it once more.

You have:

• knowledge of digital circuit design techniques and methodologies

• knowledge of SystemVerilog, Verilog or VHDL

• understanding of FPGA implementation or ASIC design

You might also have some knowledge or understanding of:

• Deep Learning and Artificial Intelligence

• UVM (or similar digital verification methodology)

• Low power design techniques and power-aware verification

• Object-Oriented Programming (OOP)

• Python

Position

Work type: Engineering, R&D | Work experience: 1-5 years | Location: Zug/Zürich, Switzerland

You will be in charge of the development, maintenance, and verification of multiple designs. In this role, you will:

• be in charge of the design of one or more digital hardware modules

• take responsibility for the verification of one or more modules

• investigate new technologies and techniques for AI acceleration

• help and supervise less experienced colleagues

Our expectation for junior engineers is to quickly become a reference point for younger colleagues, preparing themselves for a senior engineer position.

Profile

Committed to making your colleagues and team successful, you're a good communicator willing to support younger team members. You're curious, solutions orientated and a problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome and then to improve it once more.

You have:

• knowledge of digital circuit design techniques and methodologies

• knowledge of SystemVerilog, Verilog or VHDL

• Experience of FPGA/ASIC design or verification

You might also have some knowledge or understanding of:

• Deep Learning and Artificial Intelligence

• UVM (or similar digital verification methodology)

• Low power design techniques and power-aware verification

• Object-Oriented Programming (OOP)

• Python

Position

Work type: Engineering, R&D and management | Work experience: 7+ years of experience | Location: Zug/Zürich, Switzerland

We are looking for an experienced engineer to take responsibility for the physical implementation flow of our digital IPs and supervise that they match the requirements in terms of power, timing and area.. In this role, you will be in charge of:

• Provide feedback to the engineering team working on HDL and support them until all design metrics are satisfied.

• Implementing and supervising the physical implementation flow

• Be in charge for the final signoff before tape-outs

• Supervise the manufacturing flow of prototypes

• Interact with foundries engineers

• Identify and manage all digital IPs for Synthara’s ASICs

Profile

Synthara is looking for an experienced engineer with previous experience with chip tape-outs and team management. We seek a reliable figure whose work is characterized by the highest quality standard, with a long-term vision and career expectations.

You have:

• Experience in digital design sign-off

• Experience with Cadence tools

• Expertise in power optimization and timing closure

• Expertise in power estimation techniques

• Expertise in 28nm (or smaller) technologies

• A methodical, high quality and reliable approach to work

Position

Work type: Engineering | Work experience: NA | Location: Zug/Zürich, Switzerland

In this role, you will take ownership of analog subsystems in Synthara’s ASICs. You will be involved in the

• Design and verification of analog circuits for ASICs.

• Layout and post-layout verification

• Be responsible for post-production testing of all analog sub-systems

Profile

You must have/be:

• A final year MS/PhD work with knowledge of analog IC design

• A strong and clear grasp of analog IC design with the ability to communicate effectively

• A rigorous and professional attitude to planning and meeting deliverables

• Experience in designing one or more of the following is desirable:

  • • • Data-converters

      • Ultra-low-power amplifier circuits

      • Power management

      • Reference design

      • PLLs

      • Sensor signal processing

Position

Work type: Engineering | Work experience: MS with 10 or PhD with 7 years | Location: Zug/Zürich, Switzerland

In this role, you will lead all the analog design efforts active within Synthara. You will

• Sign-off on all analog sub-systems

• Final sign-off of all Synthara ASICs

• Identify and procure all analog IPs for Synthara’s ASICs

• Perform system level requirements analysis, conceptual, preliminary and detailed design including verification of analog circuits and subsystems

• Perform regular reviews of all analog/mixed-signal design efforts, including analog AI systems

• Build an analog design team

• Lead post-production testing of all analog sub-systems

Profile

You must have:

• MS with 10 years or PhD with 7 years work experience in analog IC design.

• Proven track record in analog and mixed-signal circuit design.

• Experience in mentoring junior analog designers.

• Hands-on design experience in sub-45nm CMOS.

• Experience in design of one or more of the following:

  • Data-converters

  • Ultra-low-power amplifier circuits

  • Power management

  • Reference design

  • PLLs

  • Sensor signal processing

Position

Work type: Engineering, R&D | Work experience: 3-5 years of experience | Location: Zug/Zürich, Switzerland

Our technologies exploit innovative mixed-signal-processing and analog computational techniques to achieve dramatic improvements in processing AI models. In this role, you will

• Work on new mixed-signal processing technologies

• Coordinate with the system’s architect to ensure functional fit.

• System modelling for performance and energy-estimation

• Develop FPGA emulators for modeling our mixed-signal units

Profile

You must have:

• MS + 3 years or PhD with emphasis on Mixed-Signal processing.

• A good understanding of signal processing and the ability to apply these ideas in unconventional settings.

• The motivation to understand AI/ML and apply this understanding to develop new solutions.

• Experience in design and modelling of mixed-signal circuits such as filters, sigma-delta circuits, etc.

You may also already have developed or are willing to develop

• an understanding of noise and mismatch issues in analog AI accelerators.

• analog/mixed-signal designs at advanced technology nodes.

• ability to write HDL code for FPGAs and code in Python.

• Strong knowledge of deep learning and artificial intelligence.

• Layout design of large memory arrays and analog AI accelerators.

Position

Work type: Engineering, R&D and management | Work experience: 7+ years | Location: Zug/Zürich, Switzerland

In our systems, the software-hardware interaction plays a critical role and is a fundamental key in the minimization of energy consumption and in the maximization of computational speed. We are looking for an experienced software engineer to become the head of our software engineering team, taking charge of the development of our software. In this role you will:

• Lead the software engineering team

• Plan the development of our software

• Design and supervise

  • • • the implementation of drivers for embedded systems

      • the implementation of model compilers

      • the implementation of software API

Profile

We are looking for an experienced engineer with experience in management and planning, able to define and manage the team workload and timelines. Our ideal profile mixes management skills with a hands-on approach, especially in the initial phase of product development. A long-term horizon, giving great importance to maintainability, is fundamental. You have:

• Experience in team management

• Experience in development planning

• Experience in embedded systems or compiler design

You might also have:

• Experience in Linux/Windows driver design

• Experience with DirectX/DirectML/OpenCL

• Knowledge of Deep Learning

• Knowledge of Tensorflow/Pytorch

Position

Work type: Engineering, R&D | Work experience: 1+ years | Location: Zug/Zürich, Switzerland

As embedded software engineer, you will have to work on the implementation and design of drivers, compilers, and API, working with other software engineers and working closely with the hardware engineering team. In this role you will:

• Work on Linux/Windows drivers

• Work on Deep Learning model parsers

• Work on Deep Learning model compilers

• Work on hardware-software API

Profile

We are looking for highly-motivated engineers, willing to face the challenges of a startup working on the most advanced technologies. Work quality and long-term maintainability are key features, as well as an interest in exploring alternative design pathways to improve the hardware-software interactions.

You must have:

• PhD or MS in computer science or programming with some previous work experience

• C, C++, Python

Highly appreciated are:

• Experience with embedded systems

• Experience with driver coding

• Experience with CUDA, Vulkan, DirectX, DirectML, OpenCL or OpenCV

Position

Work type: Engineering, R&D | Work experience: 3+ years | Location: Zug/Zürich, Switzerland

As physical design engineer, you will support and participate in the design of our analog and mixed signal technology and you will be in charge of our digital synthesis and place&route flows. You will have the ultimate word on the pre-tape out quality check and on verifying that our design is ready for sign-off. Key-aspects of the position are:

• Responsibility of digital synthesis flow

• Responsibility of digital place&route flow

• Physical transistors layout

• Physical design sign-off and quality check

Profile

We are looking for highly-motivated engineers, willing to face the challenges of a startup working on the most advanced technologies. Work quality and long-term maintainability are key features, as well as an interest in exploring alternative design pathways to improve the hardware-software interactions.

You must have:

• PhD or MS in Electronics

• Experience with both Cadence and Synopsys tools

• Experience with sub-22nm technology

Highly appreciated are:

• Machine learning knowledge

• Digital design capabilities

Position

Work type: Engineering, R&D | Work experience: 3+ years | Location: Zug/Zürich, Switzerland

You will work on development of advanced in-memory compute technology and circuits. Your designs will one of the key pillars enabling Synthara to deliver winning products in the marketplace.

As a member of this team, your responsibilities include (but not limited to):

• Memory pathfinding activities and power performance area (PPA) optimization through design technology co-optimization (DTCO); product/design enablement

• Memory bitcell and complex periphery IC layout and automation

• Memory array/IP design, memory circuit innovation, testchip design/execution/validation

• Pre/post-Si validation/debug to enable yield and parametric tracking/ramp

Profile

We are looking for highly-motivated engineers, willing to face the challenges working on the most advanced technologies.

You must have:

• PhD or MS in Electronics

• Experience with both Cadence and Synopsys tools

• Experience with sub-22nm technology

Highly appreciated are:

• ASIC design flow and validation

• CAD tools/flows for digital and/or analog design

• CMOS custom circuit design, simulation, layout design and verification

Preferred skillset:

• Design, characterization and verification of custom memory (SRAM, Register File, ROM) circuits

• Design trade-off of power, performance and area

• Design technology co-optimization